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96 lines
3.0 KiB
C
96 lines
3.0 KiB
C
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#ifndef __MPUIIC_H
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#define __MPUIIC_H
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#include "stm32f10x.h"
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//0,<2C><>֧<EFBFBD><D6A7>ucos
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//1,֧<><D6A7>ucos
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#define SYSTEM_SUPPORT_OS 0 //<2F><><EFBFBD><EFBFBD>ϵͳ<CFB5>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD>Ƿ<EFBFBD>֧<EFBFBD><D6A7>UCOS
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//λ<><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,ʵ<><CAB5>51<35><31><EFBFBD>Ƶ<EFBFBD>GPIO<49><4F><EFBFBD>ƹ<EFBFBD><C6B9><EFBFBD>
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//<2F><><EFBFBD><EFBFBD>ʵ<EFBFBD><CAB5>˼<EFBFBD><CBBC>,<2C>ο<EFBFBD><<CM3Ȩ<33><C8A8>ָ<EFBFBD><D6B8>>><3E><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(87ҳ~92ҳ).
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//IO<49>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD>궨<EFBFBD><EAB6A8>
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#define BITBAND(addr, bitnum) ((addr & 0xF0000000)+0x2000000+((addr &0xFFFFF)<<5)+(bitnum<<2))
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#define MEM_ADDR(addr) *((volatile unsigned long *)(addr))
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#define BIT_ADDR(addr, bitnum) MEM_ADDR(BITBAND(addr, bitnum))
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//IO<49>ڵ<EFBFBD>ַӳ<D6B7><D3B3>
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#define GPIOA_ODR_Addr (GPIOA_BASE+12) //0x4001080C
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#define GPIOB_ODR_Addr (GPIOB_BASE+12) //0x40010C0C
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#define GPIOC_ODR_Addr (GPIOC_BASE+12) //0x4001100C
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#define GPIOD_ODR_Addr (GPIOD_BASE+12) //0x4001140C
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#define GPIOE_ODR_Addr (GPIOE_BASE+12) //0x4001180C
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#define GPIOF_ODR_Addr (GPIOF_BASE+12) //0x40011A0C
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#define GPIOG_ODR_Addr (GPIOG_BASE+12) //0x40011E0C
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#define GPIOA_IDR_Addr (GPIOA_BASE+8) //0x40010808
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#define GPIOB_IDR_Addr (GPIOB_BASE+8) //0x40010C08
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#define GPIOC_IDR_Addr (GPIOC_BASE+8) //0x40011008
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#define GPIOD_IDR_Addr (GPIOD_BASE+8) //0x40011408
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#define GPIOE_IDR_Addr (GPIOE_BASE+8) //0x40011808
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#define GPIOF_IDR_Addr (GPIOF_BASE+8) //0x40011A08
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#define GPIOG_IDR_Addr (GPIOG_BASE+8) //0x40011E08
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//IO<49>ڲ<EFBFBD><DAB2><EFBFBD>,ֻ<>Ե<EFBFBD>һ<EFBFBD><D2BB>IO<49><4F>!
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//ȷ<><C8B7>n<EFBFBD><6E>ֵС<D6B5><D0A1>16!
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#define PAout(n) BIT_ADDR(GPIOA_ODR_Addr,n) //<2F><><EFBFBD><EFBFBD>
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#define PAin(n) BIT_ADDR(GPIOA_IDR_Addr,n) //<2F><><EFBFBD><EFBFBD>
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#define PBout(n) BIT_ADDR(GPIOB_ODR_Addr,n) //<2F><><EFBFBD><EFBFBD>
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#define PBin(n) BIT_ADDR(GPIOB_IDR_Addr,n) //<2F><><EFBFBD><EFBFBD>
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#define PCout(n) BIT_ADDR(GPIOC_ODR_Addr,n) //<2F><><EFBFBD><EFBFBD>
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#define PCin(n) BIT_ADDR(GPIOC_IDR_Addr,n) //<2F><><EFBFBD><EFBFBD>
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#define PDout(n) BIT_ADDR(GPIOD_ODR_Addr,n) //<2F><><EFBFBD><EFBFBD>
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#define PDin(n) BIT_ADDR(GPIOD_IDR_Addr,n) //<2F><><EFBFBD><EFBFBD>
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#define PEout(n) BIT_ADDR(GPIOE_ODR_Addr,n) //<2F><><EFBFBD><EFBFBD>
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#define PEin(n) BIT_ADDR(GPIOE_IDR_Addr,n) //<2F><><EFBFBD><EFBFBD>
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#define PFout(n) BIT_ADDR(GPIOF_ODR_Addr,n) //<2F><><EFBFBD><EFBFBD>
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#define PFin(n) BIT_ADDR(GPIOF_IDR_Addr,n) //<2F><><EFBFBD><EFBFBD>
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#define PGout(n) BIT_ADDR(GPIOG_ODR_Addr,n) //<2F><><EFBFBD><EFBFBD>
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#define PGin(n) BIT_ADDR(GPIOG_IDR_Addr,n) //<2F><><EFBFBD><EFBFBD>
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// //IO<49><4F><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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// #define MPU_SDA_IN() {GPIOB->CRL&=0XFFF0FFFF;GPIOB->CRL|=(u32)7<<16;}
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// #define MPU_SDA_OUT() {GPIOB->CRL&=0XFFF0FFFF;GPIOB->CRL|=(u32)6<<16;}
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//IO<49><4F><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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#define MPU_IIC_SCL PBout(6) //SCL
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#define MPU_IIC_SDA PBout(7) //SDA
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#define MPU_READ_SDA PBin(7) //<2F><><EFBFBD><EFBFBD>SDA
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//IIC<49><43><EFBFBD>в<EFBFBD><D0B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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void MPU_IIC_Delay(void); //MPU IIC<49><43>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
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void MPU_IIC_Init(void); //<2F><>ʼ<EFBFBD><CABC>IIC<49><43>IO<49><4F>
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void MPU_IIC_Start(void); //<2F><><EFBFBD><EFBFBD>IIC<49><43>ʼ<EFBFBD>ź<EFBFBD>
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void MPU_IIC_Stop(void); //<2F><><EFBFBD><EFBFBD>IICֹͣ<CDA3>ź<EFBFBD>
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void MPU_IIC_Send_Byte(uint8_t txd); //IIC<49><43><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD>ֽ<EFBFBD>
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uint8_t MPU_IIC_Read_Byte(unsigned char ack);//IIC<49><43>ȡһ<C8A1><D2BB><EFBFBD>ֽ<EFBFBD>
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uint8_t MPU_IIC_Wait_Ack(void); //IIC<49>ȴ<EFBFBD>ACK<43>ź<EFBFBD>
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void MPU_IIC_Ack(void); //IIC<49><43><EFBFBD><EFBFBD>ACK<43>ź<EFBFBD>
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void MPU_IIC_NAck(void); //IIC<49><43><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ACK<43>ź<EFBFBD>
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void IMPU_IC_Write_One_Byte(uint8_t daddr,uint8_t addr,uint8_t data);
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uint8_t MPU_IIC_Read_One_Byte(uint8_t daddr,uint8_t addr);
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#endif
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